Канал: FPGA Revolution

FPGA 34 - Flying Cubes 3D rendering in real-time

FPGA 34 - Flying Cubes 3D rendering in real-time

FPGA 33 - Game of Pong over HDMI FPGA design

FPGA 33 - Game of Pong over HDMI FPGA design

Zynq SoC FPGA PL interrupts PS trigger software execution - S27

Zynq SoC FPGA PL interrupts PS trigger software execution - S27

FPGA 32 - Transition-minimized differential signaling (TMDS) 1280x720p @60fps RGB video over HDMI

FPGA 32 - Transition-minimized differential signaling (TMDS) 1280x720p @60fps RGB video over HDMI

FPGA 31 - Zynq SoC FPGA Data acquisition to SD card (Acquisition / DMA and record to SD card)

FPGA 31 - Zynq SoC FPGA Data acquisition to SD card (Acquisition / DMA and record to SD card)

FPGA 30 - Zynq SoC FPGA Direct Memory Access (DMA) between PS DDR memory and PL AXI4-Stream FIFO

FPGA 30 - Zynq SoC FPGA Direct Memory Access (DMA) between PS DDR memory and PL AXI4-Stream FIFO

FPGA 29 - Zynq SoC FPGA XADC application measures on-chip power supply voltages and die temperature

FPGA 29 - Zynq SoC FPGA XADC application measures on-chip power supply voltages and die temperature

FPGA 28 - The power of mixed-mode clock manager

FPGA 28 - The power of mixed-mode clock manager

FPGA 27 - Zynq SoC FPGA PL interrupts PS to trigger software execution

FPGA 27 - Zynq SoC FPGA PL interrupts PS to trigger software execution

FPGA 26 - Shared PS-PL AXI BRAM Application on Zynq SoC FPGA (VHDL)

FPGA 26 - Shared PS-PL AXI BRAM Application on Zynq SoC FPGA (VHDL)

FPGA 25 - Shared PS-PL AXI BRAM Application on Zynq SoC FPGA (Verilog)

FPGA 25 - Shared PS-PL AXI BRAM Application on Zynq SoC FPGA (Verilog)

FPGA 24 - DSP FIR Lowpass Filter with VHDL

FPGA 24 - DSP FIR Lowpass Filter with VHDL

FPGA 23 - DSP FIR Lowpass Filter with Verilog

FPGA 23 - DSP FIR Lowpass Filter with Verilog

FPGA 22 - How to do VHDL parameterization

FPGA 22 - How to do VHDL parameterization

FPGA 21 - How to do Verilog parameterization

FPGA 21 - How to do Verilog parameterization

FPGA 20 - Build complete Zynq SoC FPGA application for PYNQ-Z1 with software control of AXI GPIO LED

FPGA 20 - Build complete Zynq SoC FPGA application for PYNQ-Z1 with software control of AXI GPIO LED

FPGA 19 - AMD Xilinx VHDL CORDIC Sine/Cosine generator

FPGA 19 - AMD Xilinx VHDL CORDIC Sine/Cosine generator

FPGA 18 - AMD Xilinx Verilog CORDIC Sine/Cosine generator

FPGA 18 - AMD Xilinx Verilog CORDIC Sine/Cosine generator

FPGA 17 - Intel Altera VHDL CORDIC Sine/Cosine generator

FPGA 17 - Intel Altera VHDL CORDIC Sine/Cosine generator

FPGA 16 - Intel Altera Verilog CORDIC Sine/Cosine generator

FPGA 16 - Intel Altera Verilog CORDIC Sine/Cosine generator

FPGA 15 - Xilinx Zynq SoC FPGA Build your first "hello world" program

FPGA 15 - Xilinx Zynq SoC FPGA Build your first "hello world" program

FPGA 14 - VHDL Quartus/Questa finite-state machine design

FPGA 14 - VHDL Quartus/Questa finite-state machine design

FPGA 13 - Verilog Quartus/Questa finite-state machine design

FPGA 13 - Verilog Quartus/Questa finite-state machine design

FPGA 12 - VHDL Vivado finite-state machine design

FPGA 12 - VHDL Vivado finite-state machine design

FPGA 11 - Verilog Vivado finite-state machine design

FPGA 11 - Verilog Vivado finite-state machine design

FPGA 10 - VHDL Quartus/Questa two's complement fixed-point arithmetic

FPGA 10 - VHDL Quartus/Questa two's complement fixed-point arithmetic

FPGA 9 - Verilog Quartus/Questa two's complement fixed-point arithmetic

FPGA 9 - Verilog Quartus/Questa two's complement fixed-point arithmetic

FPGA 8 - VHDL Vivado two's complement fixed-point arithmetic

FPGA 8 - VHDL Vivado two's complement fixed-point arithmetic

FPGA 7 - Verilog Vivado two's complement fixed-point arithmetic

FPGA 7 - Verilog Vivado two's complement fixed-point arithmetic

FPGA 6 - First VHDL Quartus/Questa project for beginners

FPGA 6 - First VHDL Quartus/Questa project for beginners

FPGA 5 - First Verilog Quartus/Questa project for beginners

FPGA 5 - First Verilog Quartus/Questa project for beginners

FPGA 4 - First VHDL Vivado project for beginners

FPGA 4 - First VHDL Vivado project for beginners

FPGA 3 - First Verilog Vivado project for beginners

FPGA 3 - First Verilog Vivado project for beginners

FPGA 2 - Set up Intel Altera Quartus/Questa (free version)

FPGA 2 - Set up Intel Altera Quartus/Questa (free version)

FPGA 1 - Set up AMD Xilinx Vivado (free version)

FPGA 1 - Set up AMD Xilinx Vivado (free version)