Канал: Education 4u

Flip flops | Applications | STLD | Lec-128

Flip flops | Applications | STLD | Lec-128

Convert D flip flop to JK Flip flop | STLD | Lec-127

Convert D flip flop to JK Flip flop | STLD | Lec-127

Convert JK Flip flop to D Flip flop | STLD | Lec-126

Convert JK Flip flop to D Flip flop | STLD | Lec-126

Number Test | Example3 | reasoning Shorts

Number Test | Example3 | reasoning Shorts

Convert JK Flip flop to T flip flop | Table | STLD | Lec-125

Convert JK Flip flop to T flip flop | Table | STLD | Lec-125

Conversion from SR to JK flip flop | STLD | Lec-124

Conversion from SR to JK flip flop | STLD | Lec-124

Flip flops | Excitation tables for SR, JK, D & T | STLD | Lec-123

Flip flops | Excitation tables for SR, JK, D & T | STLD | Lec-123

Flip flops | Asynchronous inputs | STLD | Lec-122

Flip flops | Asynchronous inputs | STLD | Lec-122

flip flops | Characteristic equations | STLD | Lec-121

flip flops | Characteristic equations | STLD | Lec-121

T Flip flop | The edge triggered | STLD | Lec-120

T Flip flop | The edge triggered | STLD | Lec-120

J K Flip flop | Edge triggered | STLD | Lec-119

J K Flip flop | Edge triggered | STLD | Lec-119

Letter Series | Reasoning shorts| example 3

Letter Series | Reasoning shorts| example 3

Problems on Ages | Aptitude shorts| Example 3

Problems on Ages | Aptitude shorts| Example 3

Profit & Loss | Aptitude shorts| Example3

Profit & Loss | Aptitude shorts| Example3

Number Test | Reasoning shorts | example 2

Number Test | Reasoning shorts | example 2

Time & Distance | Aptitude shorts | Example3

Time & Distance | Aptitude shorts | Example3

Problems on Trains | Aptitude shorts | example3

Problems on Trains | Aptitude shorts | example3

Simple Interest | Aptitude shorts | example3

Simple Interest | Aptitude shorts | example3

Trains | Aptitude shorts| Example2

Trains | Aptitude shorts| Example2

Alphabet Test | Reasoning shorts | Ex3

Alphabet Test | Reasoning shorts | Ex3

Problems on Ages | Aptitude shorts | Example 2

Problems on Ages | Aptitude shorts | Example 2

Letter Series | Reasoning shorts | Ex2

Letter Series | Reasoning shorts | Ex2

Time & Work | Shorts | Example 3 | Aptitude

Time & Work | Shorts | Example 3 | Aptitude

D flip flop | Edge Triggered | STLD| Lec-118

D flip flop | Edge Triggered | STLD| Lec-118

Ratio & Proportion | Shorts | Example 2| Aptitude

Ratio & Proportion | Shorts | Example 2| Aptitude

Probability | Shorts | Example3 | Aptitude

Probability | Shorts | Example3 | Aptitude

Time & Work | example2 | Aptitude

Time & Work | example2 | Aptitude

S R Flip flop | Edge triggered | Waveforms | STLD | Lec-117

S R Flip flop | Edge triggered | Waveforms | STLD | Lec-117

D Latch | Gated | Truth Table | STLD | Lec-116

D Latch | Gated | Truth Table | STLD | Lec-116

Simple Interest | Example2 | Aptitude

Simple Interest | Example2 | Aptitude

SR latch | Gated | Truth Table | STLD | Lec-115

SR latch | Gated | Truth Table | STLD | Lec-115

Ratio & Proportion | Example 1 | Aptitude

Ratio & Proportion | Example 1 | Aptitude

S R Latch | NAND gate | STLD | Lec-114

S R Latch | NAND gate | STLD | Lec-114

S R Latch | NOR gate | STLD | Lec-113

S R Latch | NOR gate | STLD | Lec-113

Flip flops | Latches | STLD | Lec-112

Flip flops | Latches | STLD | Lec-112

Sequential circuits | Classification | STLD | Lec-111

Sequential circuits | Classification | STLD | Lec-111

Time & Distance | Example2 | Aptitude

Time & Distance | Example2 | Aptitude

Problems on Ages | Example1 | Aptitude

Problems on Ages | Example1 | Aptitude

Profit & Loss | Example2 | Aptitude

Profit & Loss | Example2 | Aptitude

Time & Work | Example1 | Aptitude

Time & Work | Example1 | Aptitude

Time & Distance | Example1 | Aptitude

Time & Distance | Example1 | Aptitude

PROM | Logic Diagram | Example problem | STLD | Lec-110

PROM | Logic Diagram | Example problem | STLD | Lec-110

Profit & Loss | Example 1 | Aptitude

Profit & Loss | Example 1 | Aptitude

Number Test | Example1 | Reasoning

Number Test | Example1 | Reasoning

PLA with PLA table | Example problem | STLD | Lec-109

PLA with PLA table | Example problem | STLD | Lec-109

Design using PLA | STLD | Lec-108

Design using PLA | STLD | Lec-108

Alphabet Test | Example1 | Reasoning

Alphabet Test | Example1 | Reasoning

Trains | Example1 | Aptitude

Trains | Example1 | Aptitude

Probability | Example 1 | Aptitude

Probability | Example 1 | Aptitude

Simple Interest | Example1 | Aptitude

Simple Interest | Example1 | Aptitude

PAL with PAL table | Example problem | STLD | Lec-107

PAL with PAL table | Example problem | STLD | Lec-107

Partnership | Example1 | Aptitude

Partnership | Example1 | Aptitude

Number systems | Example1 | Aptitude

Number systems | Example1 | Aptitude

Percentages | Example1 | Aptitude

Percentages | Example1 | Aptitude

Design using PAL | STLD | Lec-106

Design using PAL | STLD | Lec-106

Programmable Array Logic | PLA, PROM | STLD | Lec-105

Programmable Array Logic | PLA, PROM | STLD | Lec-105

ROM | Types M-ROM, P-ROM, EPROM, EEPROM | STLD | Lec-104

ROM | Types M-ROM, P-ROM, EPROM, EEPROM | STLD | Lec-104

ROM | Programmable Logic Device | Part-2/2 | STLD | Lec-103

ROM | Programmable Logic Device | Part-2/2 | STLD | Lec-103

Programmable Logic Device | Part-1/2 | STLD | Lec-102

Programmable Logic Device | Part-1/2 | STLD | Lec-102

VHDL and Verilog codes | Differences VHDL & Verilog | Digital Design | Lec-18

VHDL and Verilog codes | Differences VHDL & Verilog | Digital Design | Lec-18

Component declaration and instantiation | VHDL | Digital Design | Lec-17

Component declaration and instantiation | VHDL | Digital Design | Lec-17

Conditional and selected signal assignment statements | VHDL | Digital Design | Lec-16

Conditional and selected signal assignment statements | VHDL | Digital Design | Lec-16

Concurrent signal assignment statement | Concurrent Vs Sequential | VHDL | Digital Design | Lec-15

Concurrent signal assignment statement | Concurrent Vs Sequential | VHDL | Digital Design | Lec-15

Process statement | Case, Null , Loop | Part-2/2 | Digital IC Design | Lec-13

Process statement | Case, Null , Loop | Part-2/2 | Digital IC Design | Lec-13

Process statement | Variable, Signal, Wait & If | Part-1/2 | Digital IC Design | Lec-13

Process statement | Variable, Signal, Wait & If | Part-1/2 | Digital IC Design | Lec-13

Operators in VHDL | Logical, Relational | Digital IC Design | Lec-12

Operators in VHDL | Logical, Relational | Digital IC Design | Lec-12

Data types | Pre-defined type & Scalar type | Part-2/2 | Digital IC Design | Lec-11

Data types | Pre-defined type & Scalar type | Part-2/2 | Digital IC Design | Lec-11

Data types | Pre-defined type & Scalar type | Part-1/2 | Digital IC Design | Lec-10

Data types | Pre-defined type & Scalar type | Part-1/2 | Digital IC Design | Lec-10

VHDL | Data objects | Signal & File | Part -2/2 | Digital IC Design | Lec-09

VHDL | Data objects | Signal & File | Part -2/2 | Digital IC Design | Lec-09

VHDL | Data objects | Constant & Variable | Part -1/2 | Digital IC Design | Lec-08

VHDL | Data objects | Constant & Variable | Part -1/2 | Digital IC Design | Lec-08

VHDL | Identifiers| Basic & Extended | Digital IC Design | Lec-07

VHDL | Identifiers| Basic & Extended | Digital IC Design | Lec-07

VHDL Code | Configuration and Package declaration | Digital IC Design | Lec-06

VHDL Code | Configuration and Package declaration | Digital IC Design | Lec-06

VHDL Structural modeling | Full Adder | Digital IC Design | Lec-05

VHDL Structural modeling | Full Adder | Digital IC Design | Lec-05

VHDL Dataflow modelling | Full Adder | Digital IC Design | Lec-04

VHDL Dataflow modelling | Full Adder | Digital IC Design | Lec-04

VHDL behavioral modeling | Full Adder | Digital IC Design | Lec-03

VHDL behavioral modeling | Full Adder | Digital IC Design | Lec-03

VHDL Architecture | Declaration | Digital IC Design | Lec-02

VHDL Architecture | Declaration | Digital IC Design | Lec-02

Hazards | Static & Dynamic | STLD | Lec-101

Hazards | Static & Dynamic | STLD | Lec-101

VHDL tutorial for beginners | Entity declaration | Digital IC Design | Lec-01

VHDL tutorial for beginners | Entity declaration | Digital IC Design | Lec-01

2 bit comparator | using two 1 bit comparator modules | STLD | Lec-100

2 bit comparator | using two 1 bit comparator modules | STLD | Lec-100

Demultiplexer | Introduction | 1x4, 1x8 | STLD | Lec-99

Demultiplexer | Introduction | 1x4, 1x8 | STLD | Lec-99

Multiplexer | Boolean logic function | Examples | Part-2/2 | STLD | Lec-97

Multiplexer | Boolean logic function | Examples | Part-2/2 | STLD | Lec-97

Multiplexer | Boolean logic function | Examples | Part-1/2 | STLD | Lec-97

Multiplexer | Boolean logic function | Examples | Part-1/2 | STLD | Lec-97

16x1 multiplexer | using 2 8x1 multiplexers | STLD | Lec-96

16x1 multiplexer | using 2 8x1 multiplexers | STLD | Lec-96

Multiplexer | Introduction | 4x1 Mux | STLD | Lec-95

Multiplexer | Introduction | 4x1 Mux | STLD | Lec-95

BCD to seven segment display | decoder | Logic Diagram | STLD | Lec-94

BCD to seven segment display | decoder | Logic Diagram | STLD | Lec-94

Full adder using 3 to 8 decoder | Combinational Logic | STLD | Lec-93

Full adder using 3 to 8 decoder | Combinational Logic | STLD | Lec-93

4 to 16 decoder | using 3 to 8 decoders | STLD | Lec-92

4 to 16 decoder | using 3 to 8 decoders | STLD | Lec-92

3 to 8 decoder | Logic Diagram | STLD | Lec-90STLD | Lec-91

3 to 8 decoder | Logic Diagram | STLD | Lec-90STLD | Lec-91

Decoder | 2X4 decoder | Logic Diagram | STLD | Lec-90

Decoder | 2X4 decoder | Logic Diagram | STLD | Lec-90

Priority Encoder | Decimal to BCD | Truth Table | STLD | Lec-89

Priority Encoder | Decimal to BCD | Truth Table | STLD | Lec-89

Priority Encoder | 4 bit | Truth Table | Logic Circuit | STLD | Lec-88

Priority Encoder | 4 bit | Truth Table | Logic Circuit | STLD | Lec-88

Decimal to BCD encoder | Truth table | Logic Circuit | STLD | Lec-87

Decimal to BCD encoder | Truth table | Logic Circuit | STLD | Lec-87

Encoder | Oct to Binary | Logic Circuit | STLD | Lec-86

Encoder | Oct to Binary | Logic Circuit | STLD | Lec-86

Comparator | IC 7485 | 4-bit | STLD | Lec-85

Comparator | IC 7485 | 4-bit | STLD | Lec-85

2 -bit Comparator | Truth Table | Logic Circuit | STLD | Lec-84

2 -bit Comparator | Truth Table | Logic Circuit | STLD | Lec-84

Comparator | 1-bit | Truth Table | Logic Circuit | STLD | Lec-83

Comparator | 1-bit | Truth Table | Logic Circuit | STLD | Lec-83

Odd parity generator | Checker | Circuit | STLD | Lec-82

Odd parity generator | Checker | Circuit | STLD | Lec-82

Parity generator | checker | Even | STLD | Lec-81

Parity generator | checker | Even | STLD | Lec-81

Code converters | BCD to Binary & Vice Versa | IC's | STLD | Lec-80

Code converters | BCD to Binary & Vice Versa | IC's | STLD | Lec-80

Combinational circuit | Design | Example -2 | STLD | Lec-79

Combinational circuit | Design | Example -2 | STLD | Lec-79

Combinational cirucuit | Design | Example-1| STLD | Lec-78

Combinational cirucuit | Design | Example-1| STLD | Lec-78

Combinational circuit to 2's complement | Design | STLD | Lec-77

Combinational circuit to 2's complement | Design | STLD | Lec-77

Decimal numbers in BCD code | Detection | 5211 BCD code | SOP circuit | STLD | Lec-76

Decimal numbers in BCD code | Detection | 5211 BCD code | SOP circuit | STLD | Lec-76

Decimal numbers in Gray code | Detect | 4bit gray code | Design SOP circuit | STLD | Lec-75

Decimal numbers in Gray code | Detect | 4bit gray code | Design SOP circuit | STLD | Lec-75

BCD to Gray Code converter | 4 bit | STLD | Lec-74

BCD to Gray Code converter | 4 bit | STLD | Lec-74

BCD to excess 3 code converter | 4-bit | Logic circuit | STLD | Lec-73

BCD to excess 3 code converter | 4-bit | Logic circuit | STLD | Lec-73

binary to BCD code converter | 4-bit | Logic Circuit | STLD | Lec-72

binary to BCD code converter | 4-bit | Logic Circuit | STLD | Lec-72

Gray to Binary code converter | 4 bit | STLD | Lec-71

Gray to Binary code converter | 4 bit | STLD | Lec-71

Binary to Gray code converter | 4 bit | STLD | Lec-70

Binary to Gray code converter | 4 bit | STLD | Lec-70

Excess 3 subtractor | Logic Diagram | STLD | Lec-69

Excess 3 subtractor | Logic Diagram | STLD | Lec-69

Excess 3 adder | Logic diagram | STLD | Lec-68

Excess 3 adder | Logic diagram | STLD | Lec-68

BCD Adder | 4-bit Parallel adder | STLD | Lec-67

BCD Adder | 4-bit Parallel adder | STLD | Lec-67

Parallel adders | IC 74LS83 | Cascading | STLD | Lec-66

Parallel adders | IC 74LS83 | Cascading | STLD | Lec-66

Serial adder | Shift Register | STLD | Lec-65

Serial adder | Shift Register | STLD | Lec-65

Look ahead carry adder | STLD | Lec-64

Look ahead carry adder | STLD | Lec-64

Binary adder subtractor | 4-bit | STLD | Lec-63

Binary adder subtractor | 4-bit | STLD | Lec-63

4 bit subtractor | Block Diagram | STLD | Lec-62

4 bit subtractor | Block Diagram | STLD | Lec-62

4 bit parallel adder | Full adder | STLD | Lec-61

4 bit parallel adder | Full adder | STLD | Lec-61

Full subtractor | Truth table & Logic Circuit | STLD | Lec-60

Full subtractor | Truth table & Logic Circuit | STLD | Lec-60

Half subtractor | NAND | NOR gates | STLD | Lec-59

Half subtractor | NAND | NOR gates | STLD | Lec-59

Full adder using half adders | STLD | Lec-58

Full adder using half adders | STLD | Lec-58

Full adder | Combinational circuit | STLD | Lec-57

Full adder | Combinational circuit | STLD | Lec-57

Half adder | Combinational circuit | STLD | Lec-56

Half adder | Combinational circuit | STLD | Lec-56

Quine McCluskey method | Introduction | STLD | Lec-55

Quine McCluskey method | Introduction | STLD | Lec-55

k map | Example 6 - variable | STLD | Lec-54

k map | Example 6 - variable | STLD | Lec-54

k map | 6 - variable | Introduction | STLD | Lec-53

k map | 6 - variable | Introduction | STLD | Lec-53

5 - Variable k map | Example-2 | POS | STLD | Lec-52

5 - Variable k map | Example-2 | POS | STLD | Lec-52

Five Variable k map | Example-2 | SOP | STLD | Lec-51

Five Variable k map | Example-2 | SOP | STLD | Lec-51

Five Variable k map | Example-1 | POS | STLD | Lec-50

Five Variable k map | Example-1 | POS | STLD | Lec-50

Five Variable k map | Example-1 | SOP | STLD | Lec-49

Five Variable k map | Example-1 | SOP | STLD | Lec-49

Five variable K map | Introduction | STLD | Lec-48

Five variable K map | Introduction | STLD | Lec-48

Prime implicants | Examples | Essential | STLD | Lec-47

Prime implicants | Examples | Essential | STLD | Lec-47

False Prime Implicants | Essential & Redundant | STLD | Lec-46

False Prime Implicants | Essential & Redundant | STLD | Lec-46

Prime Implicants | Essential, Redundant, Selective | STLD | Lec-45

Prime Implicants | Essential, Redundant, Selective | STLD | Lec-45

k- map Simplification | Boolean Expressions | STLD | Lec-44

k- map Simplification | Boolean Expressions | STLD | Lec-44

k map Simplification | Dont care conditions | STLD | Lec-43

k map Simplification | Dont care conditions | STLD | Lec-43

Six diode sampling gate | applications of sampling gate | PDC | Lec-131

Six diode sampling gate | applications of sampling gate | PDC | Lec-131

k-map 4 variables | Examples | Part-2/2 | STLD | Lec-42

k-map 4 variables | Examples | Part-2/2 | STLD | Lec-42

Four diode sampling gate | Circuit diagram | PDC | Lec-130

Four diode sampling gate | Circuit diagram | PDC | Lec-130

k-map 4 variables | Examples | Part-1/2 | STLD | Lec-41

k-map 4 variables | Examples | Part-1/2 | STLD | Lec-41

Bidirectional sampling gate | Diode | PDC | Lec-129

Bidirectional sampling gate | Diode | PDC | Lec-129

k-map | 4 variable | POS | STLD | Lec-40

k-map | 4 variable | POS | STLD | Lec-40

Gate circuit | Reduction of pedestal | PDC | Lec-128

Gate circuit | Reduction of pedestal | PDC | Lec-128

K - Map | 4- variable | SOP | Example | STLD | Lec-39

K - Map | 4- variable | SOP | Example | STLD | Lec-39

Bidirectional sampling gates | transistors | PDC | Lec-127

Bidirectional sampling gates | transistors | PDC | Lec-127

Full adder circuit using k map | 3 variable | STLD | Lec-38

Full adder circuit using k map | 3 variable | STLD | Lec-38

Unidirectional diode gates | more than one input | PDC | Lec-126

Unidirectional diode gates | more than one input | PDC | Lec-126

K - map | 3- Variable | POS Minimization | STLD | Lec-37

K - map | 3- Variable | POS Minimization | STLD | Lec-37

Unidirectional sampling gate | Diode | PDC | Lec-125

Unidirectional sampling gate | Diode | PDC | Lec-125

K - Map | 3- variable | SOP | Example | STLD | Lec-36

K - Map | 3- variable | SOP | Example | STLD | Lec-36

What is K map | Introduction | Two variable | STLD | Lec-35

What is K map | Introduction | Two variable | STLD | Lec-35

AOI to NAND Conversion | NOR | Examples | STLD | Lec-34

AOI to NAND Conversion | NOR | Examples | STLD | Lec-34

Basic gates to NAND | NOR gate | Conversion | STLD | Lec-33

Basic gates to NAND | NOR gate | Conversion | STLD | Lec-33

Canonical forms | Minterms & Maxterms | Conversion | STLD | Lec-32

Canonical forms | Minterms & Maxterms | Conversion | STLD | Lec-32

Boolean functions | Representation | SOP | POS | STLD | Lec-31

Boolean functions | Representation | SOP | POS | STLD | Lec-31

Sweep circuit | Sine wave frequency division | PDC | Lec-124

Sweep circuit | Sine wave frequency division | PDC | Lec-124

Boolean expressions | Simplification | STLD | Lec-30

Boolean expressions | Simplification | STLD | Lec-30

Sweep circuit | Synchronization | Symmetrical signals | PDC | Lec-123

Sweep circuit | Synchronization | Symmetrical signals | PDC | Lec-123

Boolean algebra | Axioms and laws | Part-2/2 | STLD | Lec-29

Boolean algebra | Axioms and laws | Part-2/2 | STLD | Lec-29

Caselet DI | DI | E-commerce | Reasoning | Part - 07 | Bharath Kumar

Caselet DI | DI | E-commerce | Reasoning | Part - 07 | Bharath Kumar

Phase delay | phase jitters | Divider | PDC | Lec-122

Phase delay | phase jitters | Divider | PDC | Lec-122

Caselet Problems | DI | WHO survey | Reasoning | Part - 06 | Bharath Kumar

Caselet Problems | DI | WHO survey | Reasoning | Part - 06 | Bharath Kumar

Astable multivibrator | Synchronization | PDC | Lec-121

Astable multivibrator | Synchronization | PDC | Lec-121

Boolean algebra | Axioms and laws | Part-1/2 | STLD | Lec-28

Boolean algebra | Axioms and laws | Part-1/2 | STLD | Lec-28

Logic gates | Pulsed operation | STLD | Lec-27

Logic gates | Pulsed operation | STLD | Lec-27

Boolean Expression Examples | Solved | STLD | Lec-26

Boolean Expression Examples | Solved | STLD | Lec-26

Inhibit circuits | Enable | STLD | Lec-25

Inhibit circuits | Enable | STLD | Lec-25

Exclusive NOR gate | Truth Table | STLD | Lec-24

Exclusive NOR gate | Truth Table | STLD | Lec-24

Exclusive OR gate | Truth Table | Properties | STLD | Lec-23

Exclusive OR gate | Truth Table | Properties | STLD | Lec-23

NOR gate | 2 i/p | Universal gate | STLD | Lec-22

NOR gate | 2 i/p | Universal gate | STLD | Lec-22

NAND gate | 2 i/p | Universal gate | STLD | Lec-21

NAND gate | 2 i/p | Universal gate | STLD | Lec-21

Logic gates | AND | OR | NOT | STLD | Lec-20

Logic gates | AND | OR | NOT | STLD | Lec-20

Gray code | Binary to Gray conversion | STLD | Lec-19

Gray code | Binary to Gray conversion | STLD | Lec-19

Excess 3 Code | Subtraction | 9's and 10's complement | STLD | Lec-18

Excess 3 Code | Subtraction | 9's and 10's complement | STLD | Lec-18

Excess 3 code | Table | addition | Substation | STLD | Lec-17

Excess 3 code | Table | addition | Substation | STLD | Lec-17

BCD subtraction | 9's and 10's complement | STLD | Lec-16

BCD subtraction | 9's and 10's complement | STLD | Lec-16

Astable blocking oscillator | RC controlled | Frequency division | PDC | Lec-120

Astable blocking oscillator | RC controlled | Frequency division | PDC | Lec-120

BCD Addition | Subtraction | STLD | Lec-15

BCD Addition | Subtraction | STLD | Lec-15

Sweep circuit | Frequency division | PDC | Lec-119

Sweep circuit | Frequency division | PDC | Lec-119

Codes Classification | Cyclic & reflective codes | STLD | Lec-14

Codes Classification | Cyclic & reflective codes | STLD | Lec-14

Relaxation devices | Pulse synchronization | PDC | Lec-118

Relaxation devices | Pulse synchronization | PDC | Lec-118

Hexadecimal arithmetic | Addition & Substration | STLD | Lec-13

Hexadecimal arithmetic | Addition & Substration | STLD | Lec-13

Dynamic CMOS logic | Four phase clock | PDC | Lec-117

Dynamic CMOS logic | Four phase clock | PDC | Lec-117

Octal to hexadecimal Conversion | Decimal Point | Vice Versa | STLD | Lec-12

Octal to hexadecimal Conversion | Decimal Point | Vice Versa | STLD | Lec-12

Pass Transistor | Transmission Gate | Switch logic | PDC | Lec-116

Pass Transistor | Transmission Gate | Switch logic | PDC | Lec-116

NOR gate | CMOS Logic family | PDC | Lec-115

NOR gate | CMOS Logic family | PDC | Lec-115

NAND gate | CMOS Logic family | PDC | Lec-114

NAND gate | CMOS Logic family | PDC | Lec-114

CMOS inverter | PMOS & NMOS | Logic family | PDC | Lec-113

CMOS inverter | PMOS & NMOS | Logic family | PDC | Lec-113

NOR gate | NMOS | 2 I/P | PDC | Lec-112

NOR gate | NMOS | 2 I/P | PDC | Lec-112

NAND gate | 2 i/p | NMOS | PDC | Lec-111

NAND gate | 2 i/p | NMOS | PDC | Lec-111

NMOS logic circuits | Inverter | PDC | Lec-110

NMOS logic circuits | Inverter | PDC | Lec-110

MOS Logic | Symbol | Characteristics | PDC | Lec-109

MOS Logic | Symbol | Characteristics | PDC | Lec-109

ECL NOR / OR Gate | Circuit Diagram | Introduction PDC | Lec-108

ECL NOR / OR Gate | Circuit Diagram | Introduction PDC | Lec-108

Integrated Injection logic | IIL | Inverter, NAND & NOR Gate | PDC | Lec-107

Integrated Injection logic | IIL | Inverter, NAND & NOR Gate | PDC | Lec-107

Schottky TTL | Circuit Diagram | PDC | Lec-106

Schottky TTL | Circuit Diagram | PDC | Lec-106

Tri - State TTL | Truth Table TTL Inverter | PDC | Lec-105

Tri - State TTL | Truth Table TTL Inverter | PDC | Lec-105

TTL Open Collector NAND gate | Standard TTL | PDC | Lec-104

TTL Open Collector NAND gate | Standard TTL | PDC | Lec-104

Logic Families | Introduction | Comparison | PDC | Lec-103

Logic Families | Introduction | Comparison | PDC | Lec-103

Decimal to Hexadecimal conversion | Hexadecimal to Decimal | Decimal Point | STLD | Lec-11

Decimal to Hexadecimal conversion | Hexadecimal to Decimal | Decimal Point | STLD | Lec-11

Digital IC | Characteristics | PDC | Lec-102

Digital IC | Characteristics | PDC | Lec-102