Канал: Knowledge Unlimited

NVIDIA Interview Experience | Offline Process | Senior ASIC Engineer | N. Ex. T Program

NVIDIA Interview Experience | Offline Process | Senior ASIC Engineer | N. Ex. T Program

Static Timing Analysis Example Question || STA 11 || @knowledgeunlimited

Static Timing Analysis Example Question || STA 11 || @knowledgeunlimited

Negative Setup time and Hold time || STA 10 @knowledgeunlimited

Negative Setup time and Hold time || STA 10 @knowledgeunlimited

Setup time and Hold time Question series || STA 9 || DigiQ @knowledgeunlimited

Setup time and Hold time Question series || STA 9 || DigiQ @knowledgeunlimited

Setup time & Hold time Interview Questions || STA 8 || DigiQ @knowledgeunlimited

Setup time & Hold time Interview Questions || STA 8 || DigiQ @knowledgeunlimited

Setup time Interview questions || STA 7 || DigiQ @knowledgeunlimited

Setup time Interview questions || STA 7 || DigiQ @knowledgeunlimited

STA 5, Hold time analysis #interview #statictiminganalysis #technicalinterview

STA 5, Hold time analysis #interview #statictiminganalysis #technicalinterview

Skew Timing Analysis || STA Tutorial6 || positive & Negative Skew Analysis @knowledgeunlimited

Skew Timing Analysis || STA Tutorial6 || positive & Negative Skew Analysis @knowledgeunlimited

Hold Time Analysis || STA Tutorial5 || @knowledgeunlimited #interview

Hold Time Analysis || STA Tutorial5 || @knowledgeunlimited #interview

STA || Setup time example #vlsi #engineering #timing #interview #technicalinterview

STA || Setup time example #vlsi #engineering #timing #interview #technicalinterview

Setup time example || STA Tutorial4 || Example Question @knowledgeunlimited #interview

Setup time example || STA Tutorial4 || Example Question @knowledgeunlimited #interview

Setup Time Analysis continued || STA Tutorial 3 || @knowledgeunlimited #interview

Setup Time Analysis continued || STA Tutorial 3 || @knowledgeunlimited #interview

Setup Time Analysis continued || STA Tutorial 2 || @knowledgeunlimited

Setup Time Analysis continued || STA Tutorial 2 || @knowledgeunlimited

Setup time Analysis || STA Tutorial 1 ||@knowledgeunlimited @VLSI

Setup time Analysis || STA Tutorial 1 ||@knowledgeunlimited @VLSI

NVIDIA Interview Experience || Offline Process || ASIC Engineer || N. Ex. T Program || Vinay Kumar S

NVIDIA Interview Experience || Offline Process || ASIC Engineer || N. Ex. T Program || Vinay Kumar S

Qualcomm Interview Experience and Questions || Digital Domain

Qualcomm Interview Experience and Questions || Digital Domain

Texas Instruments Interview Experience || Digital & Analog || #TIer #Interview @knowledgeunlimited

Texas Instruments Interview Experience || Digital & Analog || #TIer #Interview @knowledgeunlimited

FPGA Dumping || Hardware Implementation ||#Spartan 3E| |#xilinx ||# FPGA @knowledgeunlimited

FPGA Dumping || Hardware Implementation ||#Spartan 3E| |#xilinx ||# FPGA @knowledgeunlimited

Tutorial 36: Verilog code of Parallel In serial Out Shift Register || #PISO @knowledgeunlimited

Tutorial 36: Verilog code of Parallel In serial Out Shift Register || #PISO @knowledgeunlimited

Tutorial 35: Verilog code of serial In serial Out Shift Register || #SISO @knowledge unlimited

Tutorial 35: Verilog code of serial In serial Out Shift Register || #SISO @knowledge unlimited

Tutorial 34: Verilog code of parallel In parallel Out Shift Register || #PIPO @knowledgeunlimited

Tutorial 34: Verilog code of parallel In parallel Out Shift Register || #PIPO @knowledgeunlimited

Tutorial 33: Verilog code of Serial In parallel Out Shift Register || #SIPO @knowledgeunlimited

Tutorial 33: Verilog code of Serial In parallel Out Shift Register || #SIPO @knowledgeunlimited

Tutorial 32: Verilog code of SRFF (UDP) || #udp || #VLSI || #Verilog @knowledgeunlimited

Tutorial 32: Verilog code of SRFF (UDP) || #udp || #VLSI || #Verilog @knowledgeunlimited

Tutorial 31: Verilog code of DFF (UDP) || #udp || #VLSI || #Verilog @knowledgeunlimited

Tutorial 31: Verilog code of DFF (UDP) || #udp || #VLSI || #Verilog @knowledgeunlimited

Tutorial 30: Verilog code of SR Flip Flop || #VLSI || #Verilog @knowledgeunlimited

Tutorial 30: Verilog code of SR Flip Flop || #VLSI || #Verilog @knowledgeunlimited

Tutorial 29: Verilog code of T Flip Flop || #VLSI || #Verilog @knowledgeunlimited

Tutorial 29: Verilog code of T Flip Flop || #VLSI || #Verilog @knowledgeunlimited

Tutorial 28: Verilog code of JK Flip Flop || #VLSI || #Verilog @knowledgeunlimited

Tutorial 28: Verilog code of JK Flip Flop || #VLSI || #Verilog @knowledgeunlimited

Tutorial 27: Verilog code of D Flip Flop || #VLSI || #Verilog @knowledgeunlimited

Tutorial 27: Verilog code of D Flip Flop || #VLSI || #Verilog @knowledgeunlimited

why it's not synthesizable?? #VLSI #Verilog #Dff #shorts

why it's not synthesizable?? #VLSI #Verilog #Dff #shorts

Priority encoder #VLSI #Verilog #Electronics #shorts

Priority encoder #VLSI #Verilog #Electronics #shorts

Tutorial 26: Verilog code of Priority Encoder|| #VLSI || #Verilog

Tutorial 26: Verilog code of Priority Encoder|| #VLSI || #Verilog

Tutorial 25: Verilog code of 8 to 3 Encoder|| #VLSI || #Verilog

Tutorial 25: Verilog code of 8 to 3 Encoder|| #VLSI || #Verilog

Tutorial 24: Verilog code of 1 to 8 de-mux using Instantiation concept || #Verilog || #VLSI

Tutorial 24: Verilog code of 1 to 8 de-mux using Instantiation concept || #Verilog || #VLSI

Tutorial 23: Verilog code of 1 to 2 de-mux using if statement || #Verilog || #VLSI

Tutorial 23: Verilog code of 1 to 2 de-mux using if statement || #Verilog || #VLSI

Tutorial 22: Verilog code of 1 to 2 de-mux using Case statement || #Verilog || #VLSI

Tutorial 22: Verilog code of 1 to 2 de-mux using Case statement || #Verilog || #VLSI

Square root Amplifier || Analog design || #VLSI || #Interview

Square root Amplifier || Analog design || #VLSI || #Interview

Tutorial 21: Verilog code of 1 to 2 de-mux using data flow level of abstraction|| #VLSI || #Verilog

Tutorial 21: Verilog code of 1 to 2 de-mux using data flow level of abstraction|| #VLSI || #Verilog

Medha servo drives pvt.ltd Interview questions || #Placement exclusive || #Studentrequest || #Animiz

Medha servo drives pvt.ltd Interview questions || #Placement exclusive || #Studentrequest || #Animiz

Tutorial 20: Verilog code of 8 to 1 mux using 2 to 1 mux || concept of Instantiation || VLSI

Tutorial 20: Verilog code of 8 to 1 mux using 2 to 1 mux || concept of Instantiation || VLSI

Tutorial 19: Verilog code of 2 to 1 mux using If_else statement/ VLSI

Tutorial 19: Verilog code of 2 to 1 mux using If_else statement/ VLSI

Tutorial 18: Verilog code of 2 to 1 mux using Case statement/ VLSI

Tutorial 18: Verilog code of 2 to 1 mux using Case statement/ VLSI

Tutorial 17: Verilog code of 2 to 1 mux using ternary operator/ Data flow level of abstraction

Tutorial 17: Verilog code of 2 to 1 mux using ternary operator/ Data flow level of abstraction

Tutorial 16: Verilog code of 16_bit adder

Tutorial 16: Verilog code of 16_bit adder

Tutorial 15: Verilog code of 4_bit subtractor using full adder/ concept of Instantiation

Tutorial 15: Verilog code of 4_bit subtractor using full adder/ concept of Instantiation

Tutorial 14: Verilog code of 4_bit adder using full adders/ Instantiation concept

Tutorial 14: Verilog code of 4_bit adder using full adders/ Instantiation concept

Tutorial 13: Verilog code of Full adder using using half adder/ Instantiation concept

Tutorial 13: Verilog code of Full adder using using half adder/ Instantiation concept

Tutorial 11: Verilog code of Full subtractor using data flow level of abstraction

Tutorial 11: Verilog code of Full subtractor using data flow level of abstraction

Tutorial 12: Verilog code of Full subtractor using Behavioral level of abstraction

Tutorial 12: Verilog code of Full subtractor using Behavioral level of abstraction

Tutorial 10: Verilog code of Full subtractor using structural level of abstraction

Tutorial 10: Verilog code of Full subtractor using structural level of abstraction

Tutorial 9: Verilog code of Half subtractor using Behavioral level of Abstraction

Tutorial 9: Verilog code of Half subtractor using Behavioral level of Abstraction

Tutorial 8: Verilog code of Half Subtractor using data flow level of abstraction

Tutorial 8: Verilog code of Half Subtractor using data flow level of abstraction

Tutorial 7: Verilog code of Half Subtractor using structural level of abstraction

Tutorial 7: Verilog code of Half Subtractor using structural level of abstraction

Tutorial 6: Verilog code of Full adder using Behavioral level of abstraction

Tutorial 6: Verilog code of Full adder using Behavioral level of abstraction

Tutorial 5: Verilog code of Full adder using Data flow level of abstraction

Tutorial 5: Verilog code of Full adder using Data flow level of abstraction

Tutorial 4: Verilog code of Full adder using structural level of abstraction

Tutorial 4: Verilog code of Full adder using structural level of abstraction

Tutorial 3: Verilog code of Half adder using Behavioral level of abstraction

Tutorial 3: Verilog code of Half adder using Behavioral level of abstraction

Tutorial 2: Verilog code of Half adder using Data flow level of abstraction

Tutorial 2: Verilog code of Half adder using Data flow level of abstraction

Tutorial 1: Verilog code of Half adder in structural level of abstraction

Tutorial 1: Verilog code of Half adder in structural level of abstraction

GK quiz-3 // Awards // upsc // RRB

GK quiz-3 // Awards // upsc // RRB

GK quiz-2 // cricket // upsc //RRB

GK quiz-2 // cricket // upsc //RRB

Digital electronics quiz-2/ VLSI placements/GATE

Digital electronics quiz-2/ VLSI placements/GATE

Digital electronics quiz-1 / VLSI placement revision / GATE

Digital electronics quiz-1 / VLSI placement revision / GATE

GK quiz-1 / 5 questions with answers in a minute

GK quiz-1 / 5 questions with answers in a minute

Analog electronics lecture 7 Eng & Telugu / Op-amp -2/ Google meet live sessions

Analog electronics lecture 7 Eng & Telugu / Op-amp -2/ Google meet live sessions

Analog Electronics lecture 6 Eng & Telugu/ Op-amp-1/ Google meet live sessions

Analog Electronics lecture 6 Eng & Telugu/ Op-amp-1/ Google meet live sessions

Analog Electronics lecture 5 Eng & Telugu/ Diode circuits-2 (Google meet live sessions)

Analog Electronics lecture 5 Eng & Telugu/ Diode circuits-2 (Google meet live sessions)

Analog electronics lecture 4 Eng & Telugu / Diode circuits-1/ ( Google meet live sessions)

Analog electronics lecture 4 Eng & Telugu / Diode circuits-1/ ( Google meet live sessions)

Boolean algebra ACE notes revision / Google meet live sessions(Eng & Tel)

Boolean algebra ACE notes revision / Google meet live sessions(Eng & Tel)

Op amp detailed introduction / current summing and voltage summing nodes

Op amp detailed introduction / current summing and voltage summing nodes

IISc Bangalore MS research interview experience/promo

IISc Bangalore MS research interview experience/promo

General Configuration of negative(-ve) feedback circuits.

General Configuration of negative(-ve) feedback circuits.

Analog electronics lecture 3 Eng&Telugu (Google meet live sessions)

Analog electronics lecture 3 Eng&Telugu (Google meet live sessions)

Analog electronics lecture 2 Eng&Telugu ( Google meet live sessions)

Analog electronics lecture 2 Eng&Telugu ( Google meet live sessions)

Analog electronics lecture 1 Eng&Telugu ( Google meet live session )

Analog electronics lecture 1 Eng&Telugu ( Google meet live session )

Analog(BJT) Numerical question

Analog(BJT) Numerical question

Digital Circuits:Lecture 4 intro (Live Session)

Digital Circuits:Lecture 4 intro (Live Session)

LTspice tutorial 1( # test stream , some tabs are not visible in stream )

LTspice tutorial 1( # test stream , some tabs are not visible in stream )

Compensating resistance Analog Numerical question solved

Compensating resistance Analog Numerical question solved

Miller's theorem & Miller resistances

Miller's theorem & Miller resistances

Positive feedback analog numerical solved - GATE 2020

Positive feedback analog numerical solved - GATE 2020

Simulation of negative resistance

Simulation of negative resistance

Bootstrap circuit

Bootstrap circuit

Justification to explain MOSFET can be used as an Amplifier

Justification to explain MOSFET can be used as an Amplifier

Amplifiers numerical question

Amplifiers numerical question

Thevenin's resistance using VI method - numerical question

Thevenin's resistance using VI method - numerical question

Transresistance Amplifier- CCVS( Current Controlled voltage source)

Transresistance Amplifier- CCVS( Current Controlled voltage source)

Transconductance Amplifier- VCCS( voltage controlled current source)

Transconductance Amplifier- VCCS( voltage controlled current source)

Current Amplifier-CCCS(Current Controlled Current Source)

Current Amplifier-CCCS(Current Controlled Current Source)

Voltage amplifier - VCVS ( voltage controlled voltage source)

Voltage amplifier - VCVS ( voltage controlled voltage source)

All about Amplifiers

All about Amplifiers

GATE preparation strategy to get below AIR 1000 / tips to crack gate in 1 st attempt

GATE preparation strategy to get below AIR 1000 / tips to crack gate in 1 st attempt

Vlotage division and current division short cut techniques (VDR & CDR)

Vlotage division and current division short cut techniques (VDR & CDR)

Op amp as a black box

Op amp as a black box

Medha servo drives pvt.ltd // how I got selected // tips to crack it

Medha servo drives pvt.ltd // how I got selected // tips to crack it

NPTEL certification without watching videos || Tips to get good percentage

NPTEL certification without watching videos || Tips to get good percentage

Veda IIT Analog design - How I got selected in Veda IIT as analog design engineer|| tips to crack it

Veda IIT Analog design - How I got selected in Veda IIT as analog design engineer|| tips to crack it

PN junction diode under no Bias/ equilibrium case

PN junction diode under no Bias/ equilibrium case

Drift and Diffusion current

Drift and Diffusion current

How oscillator circuit is producing output?

How oscillator circuit is producing output?

What is operating / Q-point and why is it important?

What is operating / Q-point and why is it important?

Matched filter - High signal to noise ratio filter

Matched filter - High signal to noise ratio filter

Wein bridge circuit - AC bridge

Wein bridge circuit - AC bridge

Schering bridge - AC bridge

Schering bridge - AC bridge

Anderson bridge - AC bridge

Anderson bridge - AC bridge

Maxwell's inductance capacitance bridge

Maxwell's inductance capacitance bridge

Maxwell's inductance bridge - AC bridge

Maxwell's inductance bridge - AC bridge

Kelvin's bridge - DC bridge

Kelvin's bridge - DC bridge

Wheatstone bridge - DC bridge

Wheatstone bridge - DC bridge

Why DC bias required?

Why DC bias required?

Synchronous counter analysis - 2

Synchronous counter analysis - 2

Synchronous counter analysis

Synchronous counter analysis

MOD 6 synchronous up counter design

MOD 6 synchronous up counter design

Synchronous 2 bit down counter and Up-down counter

Synchronous 2 bit down counter and Up-down counter

Introduction to counters and 2 bit synchronous up counter

Introduction to counters and 2 bit synchronous up counter

What exactly is a FLIP FLOP? Background behind flip-flop

What exactly is a FLIP FLOP? Background behind flip-flop

D flip-flop to JK flip-flop conversion

D flip-flop to JK flip-flop conversion

JK flip-flop to T flip-flop conversion

JK flip-flop to T flip-flop conversion

SR to JK flip-flop conversion : sequential circuits

SR to JK flip-flop conversion : sequential circuits

T-flip-flop : sequential circuits

T-flip-flop : sequential circuits

JK flip-flop : sequential circuits

JK flip-flop : sequential circuits

D flip flop - sequential circuits

D flip flop - sequential circuits

SR flip flop - sequential circuits

SR flip flop - sequential circuits

D-latch, JK latch, T latch - sequential circuits

D-latch, JK latch, T latch - sequential circuits

SR LATCH - sequential circuits

SR LATCH - sequential circuits

NAND based memory element, why Latches?

NAND based memory element, why Latches?

NOR based memory element - Sequential circuits introduction

NOR based memory element - Sequential circuits introduction

Over damped second order system - Analysis

Over damped second order system - Analysis

Aptitude - Ratios of different Time periods

Aptitude - Ratios of different Time periods

Aptitude - Time and Distance

Aptitude - Time and Distance

Critically damped second order system

Critically damped second order system

Location of poles of an Underdamped second order system

Location of poles of an Underdamped second order system

Peak overshoot and settling time of a second order Underdamped system

Peak overshoot and settling time of a second order Underdamped system

Peak time of an Underdamped second order system

Peak time of an Underdamped second order system

Rise time of an Underdamped second order system

Rise time of an Underdamped second order system

Underdamped system step response derivation

Underdamped system step response derivation

Un-damped system, Analysis of second order system

Un-damped system, Analysis of second order system

Analysis of first order system

Analysis of first order system

Forms of Transfer function -Control systems

Forms of Transfer function -Control systems

Gate solved examples on Typenumber concept - Control systems

Gate solved examples on Typenumber concept - Control systems

Standard second order system

Standard second order system

Standard first order system-Transfer function

Standard first order system-Transfer function

Time domain analysis basics and introduction

Time domain analysis basics and introduction

Superposition theorem - previous Gate solved example

Superposition theorem - previous Gate solved example

Mason's gain Formula shortcut approach

Mason's gain Formula shortcut approach

Mason's gain Formula

Mason's gain Formula

How to draw the axis

How to draw the axis

Network analysis -previous gate solved question

Network analysis -previous gate solved question

Block diagram to signal flow graph conversion

Block diagram to signal flow graph conversion

Time and distance previous gate questions solved -2

Time and distance previous gate questions solved -2

Aptitude -time and distance (same distance concept)

Aptitude -time and distance (same distance concept)

Block diagram reduction - previous gate question (solved)

Block diagram reduction - previous gate question (solved)

Block diagram reduction - solved example

Block diagram reduction - solved example

Time and distance-Solved example (if time taken by them was given same)

Time and distance-Solved example (if time taken by them was given same)

Block diagram reduction rules

Block diagram reduction rules

Initial and final value theorem

Initial and final value theorem

Sensitivity due to closed loop system

Sensitivity due to closed loop system

Sensitivity due to openloop function

Sensitivity due to openloop function

Transfer function calculation of electrical systems

Transfer function calculation of electrical systems

Time and distance - Aptitude

Time and distance - Aptitude

Standard test inputs - unit step ,ramp, parabolic functions

Standard test inputs - unit step ,ramp, parabolic functions

Impulse response of a system- test signals

Impulse response of a system- test signals

Closed loop Transfer function derivation

Closed loop Transfer function derivation

how to find LCM if HCF was given and vice-versa

how to find LCM if HCF was given and vice-versa

Factorial of a number using LabVIEW

Factorial of a number using LabVIEW

Addition of N numbers using LabVIEW

Addition of N numbers using LabVIEW

Array max and min using NI LabVIEW

Array max and min using NI LabVIEW

LCM Finding in an easy way - APTITUDE

LCM Finding in an easy way - APTITUDE

Temperature conversion using NI LabVIEW

Temperature conversion using NI LabVIEW

QPSK using NI LabVIEW

QPSK using NI LabVIEW

Transfer function and it's limitations

Transfer function and it's limitations

open loop vs closed loop control systems-introduction (control systems)

open loop vs closed loop control systems-introduction (control systems)

Control systems - course contents (for gate also)

Control systems - course contents (for gate also)

Frequency Shift Keying using NI LabVIEW

Frequency Shift Keying using NI LabVIEW

Binary Phase Shift Keying using NI LabVIEW

Binary Phase Shift Keying using NI LabVIEW

Amplitude Shift Keying using NI LabVIEW

Amplitude Shift Keying using NI LabVIEW

Frequency Division Multiplexing using LabVIEW

Frequency Division Multiplexing using LabVIEW

Frequency Modulation using LabVIEW

Frequency Modulation using LabVIEW

Ssb sc modulation and demodulation using NI LabVIEW

Ssb sc modulation and demodulation using NI LabVIEW

Dsb sc Modulation and demodulation using NI LabVIEW

Dsb sc Modulation and demodulation using NI LabVIEW

Amplitude modulation using NI LABVIEW

Amplitude modulation using NI LABVIEW

Fulladder using Halfadder

Fulladder using Halfadder

NI LabVIEW - introduction and different blocks used for design

NI LabVIEW - introduction and different blocks used for design

NI LabVIEW - course contents

NI LabVIEW - course contents

Aptitude- coprimes or relatively primes

Aptitude- coprimes or relatively primes

verilog code for fulladder

verilog code for fulladder

Aptitude- HCF ,finding HCF in simple and easy way

Aptitude- HCF ,finding HCF in simple and easy way

Xilinx- verilog code for Halfadder

Xilinx- verilog code for Halfadder

Xilinx- installation and introduction

Xilinx- installation and introduction

Aptitude- Divisibility rules (cond...)

Aptitude- Divisibility rules (cond...)

Aptitude - Divisibility Rules

Aptitude - Divisibility Rules

Radar Design using conditional probability

Radar Design using conditional probability

Bug in KVL ??

Bug in KVL ??

Cutting with knife

Cutting with knife

BOOM -Voltages in parallel...be careful

BOOM -Voltages in parallel...be careful

Flame - Whoe my finger is Burnt...

Flame - Whoe my finger is Burnt...

Poynting theorem and poynting vector

Poynting theorem and poynting vector

continuity equation and relaxation time

continuity equation and relaxation time

Electrostatics - electromagnetic wave propagation

Electrostatics - electromagnetic wave propagation

Electrostatics - Electromagnetic wave propagation intro ( part 1)

Electrostatics - Electromagnetic wave propagation intro ( part 1)

Electrostatics - Lossy dielectrics ( cont..)

Electrostatics - Lossy dielectrics ( cont..)