Канал: Dr Anuj Grover

Inauguration VLSI Summer Training 2024

Inauguration VLSI Summer Training 2024

Session - 8: How to Design a PCB with KiCAD?

Session - 8: How to Design a PCB with KiCAD?

Session-4 : How to choose a microcontroller for your product - part-1

Session-4 : How to choose a microcontroller for your product - part-1

Session-3 : Design Thinking and Ideation Principles

Session-3 : Design Thinking and Ideation Principles

Session-1 - Product Ideas Review

Session-1 - Product Ideas Review

Session-2 : Product Design Principles - Prof. Anmol

Session-2 : Product Design Principles - Prof. Anmol

Centre for Intelligent Product Development - CiPD

Centre for Intelligent Product Development - CiPD

16.3 Hierarcy of Trends with multiple examples

16.3 Hierarcy of Trends with multiple examples

12.5 Inventive principles Another method of solution finding with examples

12.5 Inventive principles Another method of solution finding with examples

16.2 Hierarcy of Trends S curve

16.2 Hierarcy of Trends S curve

18.2 ARIZ Example SRAM Cell

18.2 ARIZ Example SRAM Cell

21.2 How TRIZ helps in Patent circumvention

21.2 How TRIZ helps in Patent circumvention

18.1 ARIZ Introduction and stages

18.1 ARIZ Introduction and stages

21.1 How TRIZ increases brand value of companies

17.1 How to successfully pitch your idea

17.1 How to successfully pitch your idea

15.1 Question 1

15.1 Question 1

17.2 Key ingredients of a successful pitch

17.2 Key ingredients of a successful pitch

16.1 Trends of Engineering System Evolution

16.1 Trends of Engineering System Evolution

15.2 Question 2

15.2 Question 2

13.3 How to resolve physical contradiction

13.3 How to resolve physical contradiction

15.3 Question 4

15.3 Question 4

14.3 Algorithm, Power and uniqueness of Standard solutions

14.3 Algorithm, Power and uniqueness of Standard solutions

14.2 Standard Solution Measurement and detection

14.2 Standard Solution Measurement and detection

14.1 How to find Standard solutions to engineering problems Substance field diagrams

14.1 How to find Standard solutions to engineering problems Substance field diagrams

11 mp4 1 Introduction to Flow Analysis with example

11 mp4 1 Introduction to Flow Analysis with example

13.5 Summary of physical contradiction

13.5 Summary of physical contradiction

13.1 Recap of previous class Technical contradiction

13.1 Recap of previous class Technical contradiction

13.4 Algorithm for resolving physical contradiction with Example Improve writeability of SRAM wi

13.4 Algorithm for resolving physical contradiction with Example Improve writeability of SRAM wi

13.2 Physical contradiction

13.2 Physical contradiction

12.7 Summary of inventive principles

12.7 Summary of inventive principles

12.6 Altshuller's matrix

12.6 Altshuller's matrix

12.4 Function oriented search FOS with Example, Key advantages and it's Algorithm

12.4 Function oriented search FOS with Example, Key advantages and it's Algorithm

11.4 Trimming for various kind of functions Example of removing operation from Reheat and blow

11.4 Trimming for various kind of functions Example of removing operation from Reheat and blow

11.6 Force Fit Game

11.6 Force Fit Game

11.5 Flow analysis Cake making process

11.5 Flow analysis Cake making process

12.3 6 thinking hats

12.3 6 thinking hats

12.2 Solution finding approach Ant story

12.2 Solution finding approach Ant story

11.2 Types of functions with example

11.2 Types of functions with example

12.1 Tech optimizer Tool

12.1 Tech optimizer Tool

11.3 Trimming for process Defination

11.3 Trimming for process Defination

10.4 9 screens method to improve the solution in hand

10.4 9 screens method to improve the solution in hand

10.3 Costumer motivation choosing one idea over other

10.3 Costumer motivation choosing one idea over other

9.2 Minimal Viable Product and introduction to feature transfer

9.2 Minimal Viable Product and introduction to feature transfer

10.2 Criteria Method for Problem Solving

10.2 Criteria Method for Problem Solving

9.1 How to benchmark your idea Benchmarking

9.1 How to benchmark your idea Benchmarking

10.1 HIT and MFC

10.1 HIT and MFC

9.4 Benchmarking Heuristic Ideation Technique HIT and Morphological Forced Connection MFC

9.4 Benchmarking Heuristic Ideation Technique HIT and Morphological Forced Connection MFC

9.3 Factors to finalize an idea Selection of an idea

9.3 Factors to finalize an idea Selection of an idea

8.8 Review of trimming

8.8 Review of trimming

8.7 Radical trimming with example

8.7 Radical trimming with example

8.6 Trimming Model with example

8.6 Trimming Model with example

8.5 Trimming Definition and Rules for trimming with examples

8.5 Trimming Definition and Rules for trimming with examples

8.4 Summary so far

8.4 Summary so far

8.3 Explanation of Function modelling with paint filing system example

8.3 Explanation of Function modelling with paint filing system example

8.2 How to categorize functions into useful and harmful functions Ranking of useful functions w

8.2 How to categorize functions into useful and harmful functions Ranking of useful functions w

8.1 How to identify the Main function and the target, Quick review Function Analysis

8.1 How to identify the Main function and the target, Quick review Function Analysis

7.5 Function Modelling

7.5 Function Modelling

7.4 Interaction Analysis

7.4 Interaction Analysis

7.2 Function Analysis Component Analysis

7.2 Function Analysis Component Analysis

7.3 Function Analysis Example of Component Analysis

7.3 Function Analysis Example of Component Analysis

7.1 Function analysis Introduction and Stages of Analysis

7.1 Function analysis Introduction and Stages of Analysis

5.1 Group Activity

5.1 Group Activity

3.1 Mindmap for Creativity boosters and blockers

3.1 Mindmap for Creativity boosters and blockers

4.1 Creativity types Adapters versus innovators

4.1 Creativity types Adapters versus innovators

6.1 Cause effect chain analysis CECA with Example

6.1 Cause effect chain analysis CECA with Example

4.2 Main Parameters of ValueMPVs

4.2 Main Parameters of ValueMPVs

2.6 Substance free diagram

2.6 Substance free diagram

2.3 What is Technical contradiction and how to identify and solve it

2.3 What is Technical contradiction and how to identify and solve it

2.5 Physical contradiction

2.5 Physical contradiction

2.4 Apply TRIZ on SRAM Cells

2.4 Apply TRIZ on SRAM Cells

2.2 TRIZ toolbox

2.2 TRIZ toolbox

2.1 Introduction to triz

2.1 Introduction to triz

1.2 Introduction of Students

1.2 Introduction of Students

1.4 Course Plan

1.4 Course Plan

1.3 Poll

1.3 Poll

1.1 Introduction of CIIPS and Anuj Sir

1.1 Introduction of CIIPS and Anuj Sir

Research Highlights from IIIT Delhi - Pravesh Biyani, Associate Professor ECE

Research Highlights from IIIT Delhi - Pravesh Biyani, Associate Professor ECE

VLSI Revisited 2023 Inaugural Session

VLSI Revisited 2023 Inaugural Session

Lecture 2 Introduction to TRIZ

Lecture 2 Introduction to TRIZ

RIISE 2023 - First Glimpses

RIISE 2023 - First Glimpses

RIISE 2023 Preview

RIISE 2023 Preview

Know RIISE 2023 : Traits of a Good Employee in AI-driven world

Know RIISE 2023 : Traits of a Good Employee in AI-driven world

Know RIISE 2023: Enabling Future with Industry 4.0

Know RIISE 2023: Enabling Future with Industry 4.0

Know RIISE 2023 : Panel on "Entrepreneurship And Its Impact on the World"

Know RIISE 2023 : Panel on "Entrepreneurship And Its Impact on the World"

Rethinking Communication in 2030

Rethinking Communication in 2030

Know RIISE 2023: Panel on Pathways after IIIT Delhi

Know RIISE 2023: Panel on Pathways after IIIT Delhi

Know RIISE 2023 : Panel on Research Opportunities in EV

Know RIISE 2023 : Panel on Research Opportunities in EV

Know RIISE 2023 - Routes to Monetize Research

Know RIISE 2023 - Routes to Monetize Research

Know RIISE 2023 - Panel on Brave New AI World

Know RIISE 2023 - Panel on Brave New AI World

Research Highlights - Feb 2023

Research Highlights - Feb 2023

RIISE 2022 - Glimpses

RIISE 2022 - Glimpses

Ek Anek aur Ekta - Sooraj Ek, Chanda Ek

Ek Anek aur Ekta - Sooraj Ek, Chanda Ek

NVM Array Organisation

NVM Array Organisation

NAND Flash Memory Architecture

NAND Flash Memory Architecture

Flash Architecture

Flash Architecture

NVM Cell - Poly Tunneling

NVM Cell - Poly Tunneling

Floating Gate Non Volatile Memory Cell Operation

Floating Gate Non Volatile Memory Cell Operation

Multi-bit Non Volatile Cell - Sensing Thresholds

Multi-bit Non Volatile Cell - Sensing Thresholds

Types of Non Volatile Memories

Types of Non Volatile Memories

Charge Pump

Charge Pump

DRAM Replica / Reference (path) Design

DRAM Replica / Reference (path) Design

DRAM Access Protocol Evolution

DRAM Access Protocol Evolution

DRAM Performance Improvement

DRAM Performance Improvement

DRAM Access Protocol

DRAM Access Protocol

DRAM Logical Diagram and Timing Arcs

DRAM Logical Diagram and Timing Arcs

DRAM Logical Organization

DRAM Logical Organization

DRAM Capacitor Design

DRAM Capacitor Design

DRAM Design

DRAM Design

Write Operation in a Cache Hierarchy

Write Operation in a Cache Hierarchy

Set Associative and Fully Associative Cache

Set Associative and Fully Associative Cache

Direct Mapped Cache

Direct Mapped Cache

Cache Subsystem Design - Associativity

Cache Subsystem Design - Associativity

Cache Operation | Part 2

Cache Operation | Part 2

Specification of Cache Subsystem

Specification of Cache Subsystem

Cache Operation

Cache Operation

Memory Hierarchy - Cache Subsystem

Memory Hierarchy - Cache Subsystem

Memory Repair - Bitslice or Column Redundancy

Memory Repair - Bitslice or Column Redundancy

SRAM Manufacturing Defects - Failure Signatures

SRAM Manufacturing Defects - Failure Signatures

Memory Repair - Bitcell Yield Recovery

Memory Repair - Bitcell Yield Recovery

Process Variations - Impact of Mismatch on SRAM Design

Process Variations - Impact of Mismatch on SRAM Design

Statistics for VLSI Design - Probability Distributions

Statistics for VLSI Design - Probability Distributions

Basics of Statistics for VLSI Design

Basics of Statistics for VLSI Design

Process Variations - Sources of Random Mismatch

Process Variations - Sources of Random Mismatch

Process Variations - Impact on Circuit Operation

Process Variations - Impact on Circuit Operation

Process Variations - Random Mismatch

Process Variations - Random Mismatch

Process Variations - Proximity Effects

Process Variations - Proximity Effects

Process Variations - Systematic Variations

Process Variations - Systematic Variations

Row Decoder - Physical Design

Row Decoder - Physical Design

Address Decoder Design -2

Address Decoder Design -2

Address Decoders

Address Decoders

Address Bus Management - Memory Scrambling

Address Bus Management - Memory Scrambling

Write Driver Design

Write Driver Design

IO Organization - MUX Placement

IO Organization - MUX Placement

Sense Amplifier Design

Sense Amplifier Design

Memory Column Decoder Design

Memory Column Decoder Design

Bitline Precharge

Bitline Precharge

IO Circuit Design

IO Circuit Design

Rom Cells

Rom Cells

Write-ability analysis - Impact of Pull Up Ratio

Write-ability analysis - Impact of Pull Up Ratio

Read Stability - Bump Estimation and Cell Ratio

Read Stability - Bump Estimation and Cell Ratio

8T and 10T SRAM Cells

8T and 10T SRAM Cells

SRAM Cell - High Density Layout Design

SRAM Cell - High Density Layout Design

SRAM Cell and Latch Stability - Butterfly Curve

SRAM Cell and Latch Stability - Butterfly Curve

SRAM Cell Design - Sizing

SRAM Cell Design - Sizing

SRAM Figures of Merit - Write Operation and Leakage

SRAM Figures of Merit - Write Operation and Leakage

SRAM Figures of Merit - Read Operation

SRAM Figures of Merit - Read Operation

SRAM Figures of Merit - Introduction

SRAM Figures of Merit - Introduction

6T SRAM Cell Operation

6T SRAM Cell Operation

SR Latch to 6T Single Port Cell Evolution

SR Latch to 6T Single Port Cell Evolution

Common SRAM Cell Topologies

Common SRAM Cell Topologies

SRAM Optimization Types

SRAM Optimization Types

Memory Datasheet | Part 2

Memory Datasheet | Part 2

Memory Datasheet | Part 1

Memory Datasheet | Part 1

Signal Flow in Timing Diagram

Signal Flow in Timing Diagram

Memory Architecture

Memory Architecture

Features Comparison in Memory

Features Comparison in Memory

Classification of Memories

Classification of Memories

Memory Types and Optimisation

Memory Types and Optimisation

MDT Class 2021 02 11 at 21 06 GMT 8

MDT Class 2021 02 11 at 21 06 GMT 8

MDT Class 2021 02 08 at 21 05 GMT 8

MDT Class 2021 02 08 at 21 05 GMT 8

MDT Class 2021 02 04 at 21 05 GMT 8

MDT Class 2021 02 04 at 21 05 GMT 8

MDT Class 2021 02 03 at 02 34 GMT 8

MDT Class 2021 02 03 at 02 34 GMT 8

MDT Class 2021 02 15 at 21 06 GMT 8

MDT Class 2021 02 15 at 21 06 GMT 8

MDT Class 2021 02 22 at 21 09 GMT 8

MDT Class 2021 02 22 at 21 09 GMT 8

MDT Class 2021 02 25 at 21 03 GMT 8

MDT Class 2021 02 25 at 21 03 GMT 8

MDT Class 2021 02 01 at 21 04 GMT 8

MDT Class 2021 02 01 at 21 04 GMT 8

MDT Class 2021 02 18 at 21 04 GMT 8

MDT Class 2021 02 18 at 21 04 GMT 8

MDT Class 2021 01 28 at 21 03 GMT 8

MDT Class 2021 01 28 at 21 03 GMT 8

MDT Class 2021 01 14 at 21 02 GMT 8

MDT Class 2021 01 14 at 21 02 GMT 8

MDT Class 2021 01 18 at 21 02 GMT 8

MDT Class 2021 01 18 at 21 02 GMT 8

MDT Class 2021 03 15 at 22 04 GMT 7

MDT Class 2021 03 15 at 22 04 GMT 7

MDT Class 2021 03 18 at 22 07 GMT 7

MDT Class 2021 03 18 at 22 07 GMT 7

MDT Class 2021 03 29 at 22 04 GMT 7

MDT Class 2021 03 29 at 22 04 GMT 7

MDT Class 2021 03 22 at 22 01 GMT 7

MDT Class 2021 03 22 at 22 01 GMT 7

Advancement in NAND Flash Design

Advancement in NAND Flash Design

MDT Class 2021 04 05 at 22 01 GMT 7

MDT Class 2021 04 05 at 22 01 GMT 7

Testability of SRAMs - BIST

Testability of SRAMs - BIST

Safety and Security Features in SRAMs

Safety and Security Features in SRAMs

MDT Class 2021 04 15 at 22 03 GMT 7

MDT Class 2021 04 15 at 22 03 GMT 7

Post Flash NVM Technologies

Post Flash NVM Technologies

Candid Interaction ECE UG 3 4th year

Candid Interaction ECE UG 3 4th year

Lecture 2 - Chip Design Flow

Lecture 2 - Chip Design Flow

Lecture 3 - Library Design flow & VLSI Economics

Lecture 3 - Library Design flow & VLSI Economics

Lecture 4 - VLSI Fabrication

Lecture 4 - VLSI Fabrication

Lecture 8 - Introduction to Standard Cell Layout Design

Lecture 8 - Introduction to Standard Cell Layout Design

Memory Design and Test Lecture 1 Introduction and Logistics

Memory Design and Test Lecture 1 Introduction and Logistics

Lecture 2 Memory Types and Signal Flow

Lecture 2 Memory Types and Signal Flow

Lecture 3 Signal Flow, Mux and Datasheet

Lecture 3 Signal Flow, Mux and Datasheet

Lecture 4 - Memory Cell Types, 6T SRAM Cell Design and Operation

Lecture 4 - Memory Cell Types, 6T SRAM Cell Design and Operation

Lecture 5 Figures of Merit and Cell Sizing

Lecture 5 Figures of Merit and Cell Sizing

Lecture 6 - SRAM Cell Layout and Other SRAM Cells

Lecture 6 - SRAM Cell Layout and Other SRAM Cells

Lecture 7 Cell Stability, Write-ability Analysis and ROM Cell

Lecture 7 Cell Stability, Write-ability Analysis and ROM Cell

MDT Office Hours 9 Feb 2022

MDT Office Hours 9 Feb 2022

Lecture 8 IO Circuits 1

Lecture 8 IO Circuits 1

Lecture 9 - IO Design Memory Scrambling

Lecture 9 - IO Design Memory Scrambling

Lecture 10 Row Address Decoding Design

Lecture 10 Row Address Decoding Design

MDT Office Hours 19 Feb 2022

MDT Office Hours 19 Feb 2022

Lecture - 11 - Mismatch

Lecture - 11 - Mismatch

Lecture 12 - Basics of Statistics in VLSI, Replica Path

Lecture 12 - Basics of Statistics in VLSI, Replica Path

Lecture 13 - Redundancy and Repair

Lecture 13 - Redundancy and Repair