This video describes the complete simulation flow step by step for VHDL Code using Xilinx ISE Design Suite 14.7 . It helps VHDL programmers to understand the working of SHIFT REGISTR along with simulation waveforms.
The VHDL code further elaborates the concept of
1. Serial-In-Serial-Out (Right Shift)
2. Serial-In-Serial-Out (Left Shift)
3. Serial-In-Parallel-Out
4. Parallel-In-Parallel-Out

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