How to configure and test DDR3 memory on custom Zynq-based hardware. Showing hardware set-up, fly-by routing strategy, Vivado and Vitis configuration, as well as memory area and eye diagram tests.
[SUPPORT]
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Mixed-signal hardware design course: [ Ссылка ]
Advanced Hardware Design Course Survey:
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[GIT]
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[LINKS]
Instagram: [ Ссылка ]
Zynq-7000 series: [ Ссылка ]
Vivado/Vitis: [ Ссылка ]
Previous video: [ Ссылка ]
TI eye diagram video: [ Ссылка ]
W2AEW eye pattern video: [ Ссылка ]
[TIMESTAMPS]
00:00 Introduction
01:40 Previous Video
01:56 Altium Designer Free Trial
02:25 DDR3 Hardware Design Overview
06:19 Vivado DDR3 Configuration (Datasheet)
13:15 Vivado Training/Board Details (PCB Delays)
17:46 Export Hardware (XSA)
18:24 Vitis DRAM Test Set-Up
19:52 Hardware Connection
20:08 Memory Address Space Test
22:26 Eye Diagram Tests
24:29 Summary & What's Next
25:22 Outro
![](https://i.ytimg.com/vi/W3Jt_y6PHjA/maxresdefault.jpg)