Due to its physical characteristics, NAND flash technology requires the use of Error Correction Codes to detect and correct bit flips in the data stored on such devices. The NAND subsystem in Linux has recently seen some improvements in its support for ECC, and this talk is an opportunity to review what are the basic principles of ECC algorithms, what are the common algorithms used for NAND flashes, and how ECC is supported in Linux for both parallel NAND flashes and SPI NAND flashes. We will discuss how ECC can be done by the NAND chip itself, by the NAND controller, by an external controller, or on the CPU, and how these different possibilities are integrated in the Linux MTD subsystem.
