Presented by Alexandre Ghiti, Upmem

The memory bottleneck and the dominant energy cost between server processors and memory can be addressed by putting computing capability into the DRAM itself.

UPMEM designed and implemented the first Processing In Memory (PIM) architecture and 32-bit processor suitable for scalable, efficient, programmable DRAM integration. UPMEM realized a 4Gb DRAM circuit comprising 8 instances of this processor, on an unchanged DRAM process. These circuits are assembled onto standard DIMM memory modules, enabling harmless integration into standard servers. In a server, thousands of C programmable GP processors with unprecedented data bandwidth are available to data-intensive applications.

Alexandre presented the technology in detail and talked about the modifications Upmem has done in the OpenPOWER firmware to be able to use their DIMM on an off-the-shelf POWER9 hardware.

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